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august 2014 docid026785 rev 1 1/13 STL19N60DM2 n-channel 600 v, 0.280 typ., 11 a mdmesh? dm2 with fast diode power mosfet in a powerflat? 8x8 hv package datasheet - preliminary data figure 1. internal schematic diagram features ? fast-recovery body diode ? extremely low gate charge and input capacitance ? low on-resistance r ds(on) ? 100% avalanche tested ? extremely high dv/dt ruggedness ? zener-protected applications ? switching applications description this high voltage n-channel power mosfet is part of the mdmesh dm2 fast recovery diode series. it offers very low recovery charge and time (q rr , t rr ) combined with low r ds(on) , rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and zvs phase-shift converters. d(3) g(1) s(2) am01476v6 6 6 6 * ' 3rzhu)/$7?[+9 %rwwrpylhz order code v ds @ t jmax r ds(on)max i d STL19N60DM2 650 v 0.320 ? 11 a table 1. device summary order code marking package packaging STL19N60DM2 19n60dm2 powerflat? 8x8 hv tape and reel www.st.com
contents STL19N60DM2 2/13 docid026785 rev 1 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
docid026785 rev 1 3/13 STL19N60DM2 electrical ratings 13 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v gs gate-source voltage 25 v i d (1) 1. the value is rated according to r thj-case and limited by package. drain current (continuous) at t c = 25 c 11 a i d (1) drain current (continuous) at t c = 100 c 6.8 a i dm (1),(2) 2. pulse width limited by safe operating area. drain current (pulsed) 44 a p tot (1) total dissipation at tc = 25 c 90 w i ar avalanche current, repetitive or not- repetitive (pulse width limited by t j max) tbd a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) tbd mj dv/dt (3) 3. i sd 11 a, di/dt 400 a/s, v ds(peak) < v (br)dss , v dd = 400 v peak diode recovery voltage slope 40 v/ns dv/dt (4) 4. v ds 480 v mosfet dv/dt ruggedness 50 v/ns t stg storage temperature - 55 to 150 c t j max. operating junction temperature 150 c table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max 1.39 c/w r thj-amb (1) 1. when mounted on fr-4 board of inch2, 2oz cu. thermal resistance junction-ambient max 45 c/w
electrical characteristics STL19N60DM2 4/13 docid026785 rev 1 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage v gs = 0, i d = 1 ma 600 v i dss zero gate voltage drain current v gs = 0, v ds = 600v 1 a v gs = 0, v ds = 600 v, t c =125 c 100 a i gss gate-body leakage current v ds = 0, v gs = 25 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 3 4 5 v r ds(on) static drain-source on- resistance v gs = 10 v, i d = 5.5 a 0.280 0.320 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 100 v, f = 1 mhz, v gs = 0 - tbd - pf c oss output capacitance - tbd - pf c rss reverse transfer capacitance - tbd - pf c oss eq. (1) 1. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss equivalent output capacitance v ds = 0 to 480 v, v gs = 0 - tbd - pf r g intrinsic gate resistance f = 1 mhz open drain 5.5 - ? q g total gate charge v dd = 480 v, i d = 11 a, v gs = 10 v (see figure 3 ) -21-nc q gs gate-source charge - tbd - nc q gd gate-drain charge - tbd - nc
docid026785 rev 1 5/13 STL19N60DM2 electrical characteristics 13 table 6. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 300 v, i d = 5.5 a, r g = 4.7 ? , v gs = 10 v (see figure 2 and 7 ) - tbd - ns t r voltage rise time - tbd - ns t d(off) turn-off delay time - tbd - ns t f current fall time - tbd - ns table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd (1) 1. the value is rated according to r thj-case and limited by package. source-drain current - 11 a i sdm (1),(2) 2. pulse width limited by safe operating area source-drain current (pulsed) - 44 a v sd (3) 3. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 11a, v gs = 0 - 1.5 v t rr (4) 4. typical values are referring to the test conditions of the same die housed in through hole package. the built-in back-to-back zener diodes have been specifically designed to enhance the esd capability of the device. the zener voltage is appropriate for efficient and cost- effective intervention to protect the device integrity. these integrated zener diodes thus eliminate the need for external components. reverse recovery time i sd = 11a, di/dt = 100a/s v dd = 100 v (see figure 4 ) -120 ns q rr (4) reverse recovery charge - tbd c i rrm (4) reverse recovery current - tbd a t rr (4) reverse recovery time i sd = 11 a, di/dt = 100a/s v dd = 100 v, t j = 150 c (see figure 4 ) -tbd ns q rr (4) reverse recovery charge - tbd c i rrm (4) reverse recovery current - tbd a
test circuits STL19N60DM2 6/13 docid026785 rev 1 3 test circuits figure 2. switching times test circuit for resistive load figure 3. gate charge test circuit figure 4. test circuit for inductive load switching and diode recovery times figure 5. unclamped inductive load test circuit figure 6. unclamped inductive waveform figure 7. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100 h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
docid026785 rev 1 7/13 STL19N60DM2 package mechanical data 13 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STL19N60DM2 8/13 docid026785 rev 1 figure 8. powerflat? 8x8 hv drawing mechanical data 8222871_rev_c
docid026785 rev 1 9/13 STL19N60DM2 package mechanical data 13 figure 9. powerflat? 8x8 hv recommended footprint (dimensions in mm.) table 8. powerflat? 8x8 hv mechanical data dim. mm min. typ. max. a 0.80 0.90 1.00 a1 0.00 0.02 0.05 b 0.95 1.00 1.05 d8.00 e8.00 d2 7.05 7.20 7.30 e2 4.15 4.30 4.40 e2.00 l 0.40 0.50 0.60 8222871_rev_c_footprint
packaging mechanical data STL19N60DM2 10/13 docid026785 rev 1 5 packaging mechanical data figure 10. powerflat? 8x8 hv tape figure 11. powerflat? 8x8 hv package orientation in carrier tape w (16.000.3) e (1.750.1) f (7.500.1) a0 (8.300.1) p1 (12.000.1) p2 (2.00.1) p0 (4.00.1) d0 ( 1.550.05) d1 ( 1.5 min) t (0.300.05) b0 (8.300.1) k0 (1.100.1) note: base and bulk quantity 3000 pcs 8229819_tape_reva
docid026785 rev 1 11/13 STL19N60DM2 packaging mechanical data 13 figure 12. powerflat? 8x8 hv reel 8229819_reel_reva
revision history STL19N60DM2 12/13 docid026785 rev 1 6 revision history table 9. document revision history date revision changes 08-aug-2014 1 first release.
docid026785 rev 1 13/13 STL19N60DM2 13 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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